EP1C3T100C8N
数据手册.pdf
Altera
阿尔特拉
主动器件
ALTERA EP1C3T100C8N 芯片, FPGA, CYCLONE 2910, SMD
The is a surface mount Field Programmable Gate Array IC with PLL clock management and 2910 logic elements. The Cyclone™ field programmable gate array with features like phase-locked loops PLLs for clocking and a dedicated double data rate DDR interface to meet DDR SDRAM and fast cycle RAM FCRAM memory requirements. It support for multiple intellectual property IP cores, including ® MegaCore® functions and Altera Megafunctions Partners Program AMPPSM megafunctions.
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- Up to 294912 RAM bits
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- Support for LVTTL, LVCMOS, SSTL-2 and SSTL-3 I/O standards
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- High-speed 640Mbps LVDS I/O support
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- Low-speed 311Mbps LVDS I/O support
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- 311Mbps RSDS I/O support
