CD74HC125

具有三态输出的高速 CMOS 逻辑四路缓冲器

The ’HC125 and ’HCT125 contain 4 independent three-state buffers, each having its own output enable input, which when "HIGH" puts the output in the high impedance state.

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Three-State Outputs

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Separate Output Enable Inputs

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Fanout Over Temperature Range

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Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

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Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

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Wide Operating Temperature Range . . . -55°C to 125°C

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Balanced Propagation Delay and Transition Times

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Significant Power Reduction Compared to LSTTL Logic ICs

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HC Types

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2V to 6V Operation

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High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

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HCT Types

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4.5V to 5.5V Operation

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Direct LSTTL Input Logic Compatibility, VIL = 0.8V Max, VIH = 2V Min

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CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor