AD9172BBPZRL
数据手册.pdfDAC 2CH Interpolation Filter 16Bit 144Pin TEBGA T/R
Product Details
The AD9172 is a high performance, dual, 16-bit digital-to-analog converter DAC that supports DAC sample rates to 12.6 GSPS. The device features an 8-lane, 15 Gbps JESD204B data input port, a high performance, on-chip DAC clock multiplier, and digital signal processing capabilities targeted at single-band and multiband direct to radio frequency RF wireless applications.
The AD9172 features three complex data input channels per RF DAC that are bypassable. Each data input channel includes a configurable gain stage, an interpolation filter, and a channel numerically controlled oscillator NCO for flexible, multiband frequency planning. The device supports up to a 1.5 GSPS complex data rate per input channel and is capable of aggregating multiple complex input data streams up to a maximum complex data rate of 1.5 GSPS. Additionally, the AD9172 supports ultrawide bandwidth modes bypassing the channelizers to provide maximum data rates of up to 3.08 GSPS with 16-bit resolution and 4.1 GSPS with 12-bit resolution.
The AD9172 is available in a 144-ball BGA_ED package.
**Product Highlights**
1. Supports single-band and multiband wireless applications with three bypassable complex data input channels per RF DAC at a maximum complex input data rate of 1.5 GSPS. One independent NCO per input channel.
2. Ultrawide bandwidth channel bypass modes supporting up to 3 GSPS data rates with 16-bit resolution and 4 GSPS with 12-bit resolution.
3. Low power dual converter decreases the amount of power consumption needed in high bandwidth and multichannel applications.
**Applications**
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- Wireless communications infrastructure
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- Multiband base station radios
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- Microwave/E-band backhaul systems
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- Instrumentation, automatic test equipment ATE
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- Radars and jammers
### Features and Benefits
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- Supports multiband wireless applications
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- 3 bypassable, complex data input channels per RF DAC
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- 1.54 GSPS maximum complex input data rate per input channel
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- 1 independent NCO per input channel
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- Proprietary, low spurious and distortion design
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- 2-tone intermodulation distortion IMD = −83 dBc at 1.8 GHz, −7 dBFS/tone RF output
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- Spurious free dynamic range SFDR <−80 dBc at 1.8 GHz, −7 dBFS RF output
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- Flexible 8-lane, 15.4 Gbps JESD204B interface
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- Supports single-band and multiband use cases
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- Supports 12-bit high density mode for increased data throughput
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- Multiple chip synchronization
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- Supports JESD204B Subclass 1
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- Selectable interpolation filter for a complete set of input data rates
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- 1×, 2×, 3×, 4×, 6×, and 8× configurable data channel interpolation
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- 1×, 2×, 4×, 6×, 8×, and 12× configurable final interpolation
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- Final 48-bit NCO that operates at the DAC rate to support frequency synthesis up to 6 GHz
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- Transmit enable function allows extra power saving and downstream circuitry protection
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- High performance, low noise PLL clock multiplier
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- Supports 12.6 GSPS DAC update rate
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- Observation ADC clock driver with selectable divide ratios
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- Low power
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- 2.55 W at 12 GSPS, dual channel mode
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- 10 mm × 10 mm, 144-ball BGA_ED with metal enhanced thermal lid, 0.80 mm pitch