74AVCH16T245DGG,11

NXP  74AVCH16T245DGG,11.  芯片, 收发器, 16位, 三态, TSSOP48

The is a 16-bit dual supply Translating Transceiver with configurable bidirectional level voltage translation and 3-state outputs. The device can be used as two 8-bit transceivers or as a 16-bit transceiver. A HIGH on nDIR selects transmission from nAn to nBn while a LOW on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCCA or VCCB are at GND level, both A and B outputs are in the high-impedance OFF-state. The bus-hold circuitry on the powered-up side always stays active. It has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

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Suspend mode

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IOFF circuitry provides partial power-down mode operation

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Complies with JEDEC standards

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Latch-up performance exceeds 100mA per JESD 78 class II

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Inputs accept voltages up to 3.6V