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74HC138N
NXP 恩智浦 主动器件

NXP  74HC138N  芯片, 74HC CMOS逻辑器件

The is a 3-to-8 line Decoder or Demultiplexer with inverting and decodes three binary weighted address inputs to eight mutually exclusive outputs. The device features three enable inputs. Every output will be high unless E1 and E2 are low and E3 is high. This multiple enable function allows easy parallel expansion to a 1-of-32 5 to 32 lines decoder with just four 138 ICs and one inverter. The 138 can be used as an eight output demultiplexer by using one of the active low enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

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CMOS input level
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Demultiplexing capability
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Multiple input enable for easy expansion
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Active low mutually exclusive outputs
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Ideal for memory chip select decoding
.
ESD protection HBM JESD22-A114F exceeds 2000V

ESD sensitive device, take proper precaution while handling the device.

74HC138N中文资料参数规格
技术参数

电源电压DC 2.00V min

输出接口数 8

电路数 1

针脚数 16

输入数 3

工作温度Max 125 ℃

工作温度Min -40 ℃

电源电压 2.6 VDC

电源电压Max 6 V

电源电压Min 2 V

封装参数

安装方式 Through Hole

引脚数 16

封装 DIP

外形尺寸

封装 DIP

物理参数

工作温度 -40℃ ~ 125℃

其他

产品生命周期 Unknown

包装方式 Bulk

制造应用 通信与网络, Communications & Networking

符合标准

RoHS标准 RoHS Compliant

含铅标准 Lead Free

REACH SVHC标准 No SVHC

REACH SVHC版本 2015/12/17

74HC138N引脚图与封装图
暂无图片
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