74HC138N
数据手册.pdfNXP 74HC138N 芯片, 74HC CMOS逻辑器件
The is a 3-to-8 line Decoder or Demultiplexer with inverting and decodes three binary weighted address inputs to eight mutually exclusive outputs. The device features three enable inputs. Every output will be high unless E1 and E2 are low and E3 is high. This multiple enable function allows easy parallel expansion to a 1-of-32 5 to 32 lines decoder with just four 138 ICs and one inverter. The 138 can be used as an eight output demultiplexer by using one of the active low enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
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- CMOS input level
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- Demultiplexing capability
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- Multiple input enable for easy expansion
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- Active low mutually exclusive outputs
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- Ideal for memory chip select decoding
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- ESD protection HBM JESD22-A114F exceeds 2000V
ESD sensitive device, take proper precaution while handling the device.