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74HC563D,652

74HC563D,652

数据手册.pdf
NXP 恩智浦 主动器件

NXP  74HC563D,652  芯片, 锁存器, D型, 透明, 三态, SOIC-20

The 74HC563D is an octal CMOS transparent D Latch pin compatible with low power Schottky TTL LSTTL. The 74HC563 is octal D-type transparent latches featuring separate D-type inputs for each latch and inverting 3-state outputs for bus oriented applications. A LE input and an OE\ input are common to all latches. It consists of eight D-type transparent latches with 3-state inverting outputs. The LE and OE\ are common to all latches. When LE is high, data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D-input changes. When LE is low the latches store the information that was present at the D-inputs a set-up time preceding the high-to-low transition of LE. When OE\ is low, the contents of the 8 latches are available at the outputs.

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3-state inverting outputs for bus oriented applications
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Inputs and outputs on opposite sides of package allowing easy interface with microprocessor
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Common 3-state output enable input
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Output capability - Bus driver
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Complies with JEDEC standard No. 7A
74HC563D,652中文资料参数规格
技术参数

电源电压DC 2.00V min

针脚数 20

位数 8

工作温度Max 125 ℃

工作温度Min -40 ℃

电源电压 2V ~ 6V

电源电压Max 6 V

电源电压Min 2 V

封装参数

安装方式 Surface Mount

引脚数 20

封装 SOIC-20

外形尺寸

封装 SOIC-20

物理参数

工作温度 -40℃ ~ 125℃

其他

产品生命周期 Obsolete

包装方式 Cut Tape CT

制造应用 Industrial, Consumer Electronics

符合标准

RoHS标准 RoHS Compliant

含铅标准 Lead Free

REACH SVHC标准 No SVHC

REACH SVHC版本 2015/12/17

74HC563D,652引脚图与封装图
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