74LVC2G17GV,125
数据手册.pdf
NXP
恩智浦
电子元器件分类
74LVC 系列 3.3 V 双通道 非反相 施密特触发器 - TSSOP-6
The is a dual non-inverting Buffer with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs can be driven from either 3.3/5V devices. This feature allows the use of these devices as translators in a mixed 3.3 and 5V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
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- High noise immunity
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- CMOS low-power consumption
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- Direct interface with TTL levels
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- Complies with JEDEC standard
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- 5V Tolerant input/output for interfacing with 5V logic
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- Latch-up performance exceeds 250mA
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- ±24mA Output drive