74F280SJ

9位奇偶校验发生器/校验器 9-Bit Parity Generator/Checker

General Description

The F280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an

even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output.

得捷:
IC PARITY GEN/CHKER 9-BIT 14SOP

贸泽:
奇偶功能 9-Bit Par Gen/Check

艾睿:
Parity Generator/Checker 9-Bit 14-Pin SOP W Rail

Chip1Stop:
Parity Generator/Checker 9-Bit 14-Pin SOP-II Rail

罗切斯特:
Parity Generator/Checker 9-Bit 14-Pin SOP-II Rail

Win Source:
IC 9-BIT GEN/CHKER 14SOP