74LVC1G125GW,125
数据手册.pdf
NXP
恩智浦
电子元器件分类
74LVC1G 系列，NXP低电压 CMOS 逻辑 单门封装 工作电压：1.65 － 5.5 兼容性：输入 LVTTL/TTL，输出 LVCMOS ### 74LVC 系列
The is a non-inverting buffer/Line Driver with 3-state output. The 3-state output is controlled by the output enable input OE. A high-level at pin OE causes the output to assume a high-impedance off-state. The input can be driven from either 3.3 or 5V devices. This feature allows the use of this device in a mixed 3.3 and 5V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
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- High noise immunity
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- ±24mA Output drive VCC=3.0V
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- CMOS Low power consumption
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- Inputs accept voltages up to 5V
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- Latch-up performance exceeds 250mA
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- Direct interface with TTL levels
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- Complies with JEDEC standard
ESD sensitive device, take proper precaution while handling the device.