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74LVC4245APW

74LVC4245APW

数据手册.pdf
NXP 恩智浦 电子元器件分类

NXP  74LVC4245APW  收发器, 转换, 3态, 1.5V至3.6V, 1.5V至5.5V, TSSOP-24

The is an octal dual supply Translating Transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to interface between a 3 and 5V bus in a mixed 3 and 5V supply environment. The device features an output enable input pin OE for easy cascading and a send/receive input pin DIR for direction control. Pin OE controls the outputs so that the buses are effectively isolated. In suspend mode, when VCCA is zero, there will be no current flow from one supply to the other supply. The A-outputs must be set 3-state and the voltage on the A-bus must be smaller than Vdiode typical 0.7V.

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5V Tolerant inputs/outputs, for interfacing with 5V logic
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CMOS low-power consumption
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Direct interface with TTL levels
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±20µA Input leakage current and off-state output current
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40µA Supply current
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Complies with JEDEC standard no. JESD8B/JESD36

ESD sensitive device, take proper precaution while handling the device.

74LVC4245APW中文资料参数规格
技术参数

电源电压DC 2.70 V, 3.60 V max

电路数 8

通道数 8

针脚数 24

位数 8

静态电流 100 nA

工作温度Max 125 ℃

工作温度Min -40 ℃

电源电压Max 3.6 V

电源电压Min 1.5 V

封装参数

安装方式 Surface Mount

引脚数 24

封装 TSSOP-20

外形尺寸

封装 TSSOP-20

物理参数

工作温度 -40℃ ~ 125℃

其他

产品生命周期 Unknown

包装方式 Each

制造应用 工业, Industrial

符合标准

RoHS标准 RoHS Compliant

含铅标准 Lead Free

REACH SVHC标准 No SVHC

REACH SVHC版本 2015/12/17

海关信息

ECCN代码 EAR99

74LVC4245APW引脚图与封装图
74LVC4245APW引脚图

74LVC4245APW引脚图

74LVC4245APW封装图

74LVC4245APW封装图

74LVC4245APW封装焊盘图

74LVC4245APW封装焊盘图

在线购买74LVC4245APW
型号 制造商 描述 购买
74LVC4245APW NXP 恩智浦 NXP  74LVC4245APW  收发器, 转换, 3态, 1.5V至3.6V, 1.5V至5.5V, TSSOP-24 搜索库存