74HC139D
数据手册.pdf
NXP
恩智浦
电子元器件分类
NXP 74HC139D 芯片, 74HC CMOS逻辑器件
The is a 2-to-4 dual Decoder/Demultiplexer decodes two binary weighted address inputs nA0, nA1 to four mutually exclusive outputs nY0\ to nY3\\. Each decoder features an enable input nE\\. When nE\ is high all outputs are forced high. The enable input can be used as the data input for a 1-to-4 demultiplexer application. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
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- Demultiplexing capability
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- Multifunction capability
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- Suitable for memory decoding, data routing or code conversion
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- Complies with JEDEC standard No. 7A
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- Active low mutually exclusive outputs
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- CMOS Input levels