SN74LV02D
Quadruple 2Input Positive-NO Gate 14-SOIC -40℃ to 85℃
description
These quadruple 2-input positive-NOR gates are designed for 2.7-V to 5.5-V VCC operation.
The SN74LV02 is available in ’s shrink small-outline package DB, which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LV02 is characterized for operation over the full military temperature range of −55°C to 125°C. The SN74LV02 is characterized for operation from −40°C to 85°C.
• EPIC Enhanced-Performance Implanted CMOS 2-µ Process
• Typical VOLP Output Ground Bounce
< 0.8 V at VCC, TA = 25°C
• Typical VOHV Output VOH Undershoot
> 2 V at VCC, TA = 25°C
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model C = 200 pF, R = 0
• Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
• Package Options Include Plastic
Small-Outline D, Shrink Small-Outline DB, and Thin Shrink Small-Outline PW and Ceramic Flat W Packages, Ceramic Chip Carriers FK, and Ceramic J 300-mil DIPs
