25LC640-I/P

MICROCHIP  25LC640-I/P  EEPROM, AEC-Q100, 64 Kbit, 8K x 8位, 2 MHz, SPI, DIP, 8 引脚

The is a 64kB serial Electrically Erasable Programmable Read-Only Memory EEPROM accessed via a simple serial peripheral interface SPI compatible serial bus. The bus signals required are a clock input SCK plus separate data in SI and data out SO lines. Access to the device is controlled through a chip select CS input. Communication to the device can be paused via the hold pin HOLD. While the device is paused, transitions on its inputs will be ignored, with the exception of chip select, allowing the host to service higher priority interrupts.

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Low-power CMOS technology

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Write cycle time - 5ms maximum

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Self-timed erase and write cycles

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Block write protection - Protect none, 1/4, 1/2 or all of array

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Built-in write protection

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Power-on/off data protection circuitry

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Write enable latch

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Write-protect pin

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Sequential read

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High reliability

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Data retention - >200 years

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ESD protection - >4000V