LPC1549JBD100

NXP  LPC1549JBD100  微控制器, 32位, ARM 皮质-M3, 72 MHz, 256 KB, 36 KB, 100 引脚, LQFP

The is a 32-bit Microcontroller based on ARM Cortex-M3 core with RISC architecture operates at a maximum frequency of 72MHz. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching. The device incorporates 256kB internal flash, 36kB internal RAM, 4kB EEPROM, two 12-channel 12-bit A/D converter with sample rates of up to 2Msps and 76 general-purpose I/O pins. This device also features peripherals like one full-speed USB 2.0 device, two SPI interfaces, three USARTs, a fast-mode plus I2C-bus interface and a CAN module.

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ARM Cortex-M3 built-in nested vectored interrupt controller NVIC

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System tick timer

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Serial wire debug SWD with four breakpoints and two watch points

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Single-cycle multiplier supported

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Memory protection unit MPU included

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Simple DMA engine with 18 channels and 20 programmable input triggers

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GPIO Interrupt generation capability with boolean pattern-matching feature on eight external inputs

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Two GPIO Grouped port interrupts

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Switch matrix for flexible configuration of each I/O pin function

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CRC Engine

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Quadrature encoder interface QEI

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24-bit 4-channel Multi-rate timer MRT

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Repetitive interrupt timer for general purpose use

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Windowed watchdog timer WWDT

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12MHz Internal RC oscillator trimmed to 1 % accuracy

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Crystal oscillator with an operating range of 1MHz to 25MHz

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Integrated PMU power management unit

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Reduced power modes - Sleep mode, deep-sleep mode, power-down mode and deep power-down mode

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Wake-up from deep-sleep and power-down modes

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Timer-controlled self wake-up from Deep power-down mode