XC3S500E-4PQG208I

XC3S500E 4PQG208I 磨码

The is a Spartan-3E FPGA device in 208 pin QFP package. This device is specifically designed to meet the needs of high volume, cost sensitive applications. The Spartan-3E family builds on success of earlier Spartan-3 family by increasing the amount of logic per I/O, significantly reducing the cost per logic cell. These features improve system performance and reduce cost of configuration. The Spartan-3E FPGA enhancements combined with advanced 90nm process technology deliver more functionality and bandwidth. The Spartan-3E family is a superior alternative to mask programmed ASICs.

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Standard performance with speed grade of 4

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500K system gates

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10476 logic cells

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1164 configuration of logic blocks CLB

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73Kbit distributed RAM and 360Kbit block RAM

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158 maximum user I/O and 65 maximum differential I/O pairs

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Clock frequency of 240MHz

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Internal supply voltage from 1.14V to 1.26V

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Up to eight digital clock managers

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Junction temperature range from -40°C to 100°C