TC5565APL-12
数据手册.pdfSRAM Chip Async Single 5V 64Kbit 8K x 8 120ns 28Pin PDIP
DESCRIPTION
The TC5565APL/AFL is 65,536 bit static random access memory organized as 8,192 words by 8 bits using CMOS technology, and operates from a single 5V supply. Advanced circuit techniques provide both high speed and low power features with a maximum operating current of 5mA/MHz and maximum access time of 100ns/120ns/150ns. When CE2 is a logical low or CEl is a logical high, the device is placed in low power standby mode in which standby current is 2uA typically. The TC5565APL/AFL has three control inputs. Two chip enable CE1, CE2 allow for device selection and data retention control, and an output enable input OE provides fast memory access. Thus the TC5565APL/AFL is suitable for use in various microprocessor application systems where high speed, low power, and battery back up are required.
The TC5565APL also features pin compatibility with the 64K bit EPROM TMM2764D.
FEATURES
· Low Power Dissipation
27.5mW/MHzMax. operating
· Standby Current: 100uAMax. Ta=70°C
· Access Time
TC5565APL/AFL-10 : 100nsMax.
TC5565APL/AFL-12 : 120nsMax.
TC5565APL/AFL-15 : 150nsMax.
· 5V Single Power Supply -
· Power Down Features: CE2, CE1
· Fully Static Operation
Data Retention Supply Voltage: 2.0-5.5V