S25FL132K0XMFB013
数据手册.pdfNOR闪存 Nor
FLASH - NOR Memory IC 32Mb 4M x 8 SPI - Quad I/O 108MHz 8-SOIC
得捷:
IC FLASH 32MBIT SPI/QUAD 8SOIC
贸泽:
NOR闪存 Nor
艾睿:
CMOS 3.0 VOLT FLASH MEMORY SERIAL PERIPHERAL INTERFACE SPI WITH MULTI-I/O
安富利:
The S25FL132K of non-volatile flash memory devices connect to a host system via a Serial Peripheral Interface SPI. Traditional SPI single bit serial input and output Single I/O or SIO is supported as well as optional two bit Dual I/O or DIO and four bit Quad I/O or QIO serial protocols. This multiple width interface is called SPI Multi-I/O or MIO. The SPI-MIO protocols use only 4 to 6 signals: * Chip Select CS# * Serial Clock SCK * Serial Data – IO0 SI – IO1 SO – IO2 WP# – IO3 HOLD#The SIO protocol uses Serial Input SI and Serial Output SO for data transfer. The DIO protocols use IO0 and IO1 to input or output two bits of data in each clock cycle.The Write Protect WP# input signal option allows hardware control over data protection. Software controlled commands can also manage data protection.The HOLD# input signal option allows commands to be suspended and resumed on any clock cycle.The QIO protocols