SN65LVDM180PWG4

高速差分线路驱动器和接收 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS

DESCRIPON

The SN65LVDM179, SN65LVDM180, SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage differential signaling LVDS to achieve high signaling rates. These circuits are similar to TIA/EIA-644 standard compliant devices SN65LVDS counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV across a 50-Ω load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.

FEATURES

• Low-Voltage Differential 50-Ω Line Drivers and Receivers

• Typical Full-Duplex Signaling Rates of 100 Mbps See Table 1

• Bus-Terminal ESD Exceeds 12 kV

• Operates From a Single 3.3-V Supply

• Low-Voltage Differential Signaling With Typical Output Voltages of 340 mV With a 50-Ω Load

• Valid Output With as Little as 50-mV Input Voltage Difference

• Propagation Delay Times

   – Driver: 1.7 ns Typical

   – Receiver: 3.7 ns Typical

• Power Dissipation at 200 MHz

   – Driver: 50 mW Typical

   – Receiver: 60 mW Typical

• LVTTL Input Levels Are 5-V Tolerant

• Driver Is High Impedance When Disabled or With VCC < 1.5 V

• Receiver Has Open-Circuit Failsafe