S25FL127SABBHIC00

SPANSION  S25FL127SABBHIC00  闪存, 或非, 128 Mbit, 16M x 8位, 108 MHz, SPI, BGA, 24 引脚

The is a Flash Non-volatile Memory connects to a host system via a serial peripheral interface SPI. Traditional SPI single bit serial input and output single I/O or SIO is supported as well as optional two bit dual I/O or DIO and four bit quad I/O or QIO serial commands. The multiple width interfaces is called SPI Multi-I/O or MIO. The Eclipse architecture features a Page Programming Buffer that allows up to 128 words 256 bytes or 256 words 512 bytes to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. Executing code directly from flash memory is often called Execute-In-Place or XIP. By using FL-S devices at the higher clock rates supported, with QIO command, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR flash memories while reducing signal count dramatically.

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Extended address for access to higher memory density

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AutoBoot for simpler access to boot code following power up