OMAPL138BZWTA3
TEXAS INSTRUMENTS OMAPL138BZWTA3. 芯片, 微处理器, ARM9, 456MHZ, NFBGA-361
The OMAP-L1X series DSP+ARM® low-power Applications Processor based on an ARM926EJ-S and a C674x DSP core. This processor provides significantly lower power than other members of the TMS320C6000™ platform of DSPs. The device enables original-equipment manufacturers OEMs and original-design manufacturers ODMs to quickly bring to market devices with robust operating systems, rich user interfaces and high processor performance through the maximum flexibility of a fully integrated, mixed processor solution. The dual-core architecture of the device provides benefits of both DSP and reduced instruction set computer RISC technologies, incorporating a high-performance TMS320C674x DSP core and an ARM926EJ-S core. The ARM926EJ-S is a 32-bit RISC processor core that performs 32- or 16-bit instructions and processes 32-, 16- or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously.
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- 375- and 456MHz ARM926EJ-S™ RISC MPU
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- ARM926EJ-S core - 32- and 16-bit Thumb® instructions and DSP instruction extensions
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- 16kB Instruction cache and data cache
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- 8kB RAM vector table
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- 64kB ROM
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- C674x instruction set feature - Superset of the C67x+ and C64x+ ISAs
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- C674x two-level cache memory architecture
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- Enhanced direct memory access controller 3 EDMA3
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- TMS320C674x floating-point VLIW DSP core
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- Supports up to four SP additions per clock and four DP additions every two clocks
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- Two multiply functional units
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- Hardware support for modulo loop operation
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- Protected mode operation
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- Exceptions support for error detection and program redirection
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- Software support - DSP BIOS™, chip support library and DSP library
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- 128kB RAM shared memory
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- Three configurable 16550-type UART modules
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- LCD controller
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- Two serial peripheral interfaces SPIs each with multiple chip selects
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- One host-port interface HPI with 16-bit-wide Muxed address and data bus for high bandwidth
