MC9S12XDG128CAA
数据手册.pdfNXP MC9S12XDG128CAA 微控制器, 16位, AEC-Q100, HCS12/S12X, 80 MHz, 128 KB, 12 KB, 80 引脚, QFP
The is a 16-bit Microcontroller based on enhanced HCS12X CPU 40MHz bus with CISC architecture operates at a maximum frequency of 80MHz. The device incorporates 128kB internal flash, 12kB internal RAM, 2kB EEPROM, 8-channel 10-bit A/D converter and 59 general-purpose I/O pins. This device also features peripherals like one inter-integrated circuit IIC bus module, one multi-scalable controller area networks MSCAN CAN 2.0 A/B software compatible module, two serial communications interface SCI and two serial peripheral interface modules SPI. The MC9S12XD family features the performance boosting XGATE co-processor. The XGATE, which is programmable in C language, has an instruction set which is optimized for data movement, logic and bit manipulation instructions. It runs at twice the bus frequency of the S12X and off-loads the CPU by providing high speed data transfer between any peripheral module, RAM and I/O ports.
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- Upward compatible with MC9S12 instruction set
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- Interrupt stacking and programmer"s model identical to MC9S12
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- Instruction queue
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- Enhanced indexed addressing
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- Enhanced instruction set
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- External bus interface EBI
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- Module mapping control MMC
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- Interrupt controller INT
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- Debug module to monitor HCS12X CPU and XGATE bus activity
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- Background debug mode BDM
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- Periodic interrupt timer PIT
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- Clock and reset generator CRG
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- Low noise/low power Pierce oscillator
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- Enhanced capture timer - 16-bit main counter with 7-bit prescaler
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- 8 PWM pulse-width modulator channels
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- On-chip voltage regulator
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- Low-voltage detect LVD with low-voltage interrupt LVI
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- Power-on reset POR circuit
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- Low-voltage reset LVR
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- Ultra low-power wake-up timer