LTC4307CMS8#PBF

LINEAR TECHNOLOGY  LTC4307CMS8#PBF  芯片, 总线缓冲器, 热插拔, 2线式, 8MSOP

The is a 2-wire hot swappable Bus Buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. It provides bidirectional buffering, keeping the backplane and card capacitances isolated. Low offset and high VOL tolerance allows multiple devices to be cascaded on the clock and data busses. If SDAOUT or SCLOUT are low for 30ms, the buffer will automatically break the bus connection. At this time the buffer automatically generates up to 16 clock pulses on SCLOUT in an attempt to free the bus. A connection will resume if the stuck bus is cleared. During insertion, the SDA and SCL lines are pre-charged to 1V to minimize bus disturbances. When driven high, the ENABLE input allows the buffer to connect after a stop bit or bus idle. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open-drain output which indicates that the backplane and card sides are connected.

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Bidirectional buffer with stuck bus recovery

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60mV Buffer offset independent of load

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30ms Stuck bus timeout

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Compatible with non-compliant VOL I2C devices

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Prevents SDA and SCL corruption during live board insertion and removal from backplane

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±5kV Human body model ESD Protection

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Isolates input SDA and SCL line from output

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Compatible with I²C, I²C fast mode and SMBus

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READY Open-drain output

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1V Precharge on all SDA and SCL lines