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LPC2917FBD144/01/,

LPC2917FBD144/01/,

数据手册.pdf
NXP(恩智浦) 主动器件

LPC2917 系列 80 kB 80 MHz ARM9 微控制器 带CAN和LIN - LQFP-144

Overview

The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCM blocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to 768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial and parallel interfaces in a single chip targeted at consumer, industrial, medical, and communication markets. To optimize system power consumption, the LPC2917/2919/01 has a very flexible Clock Generation Unit CGU that provides dynamic clock gating and scaling.

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## Features

* ARM968E-S processor running at frequencies of up to 125 MHz maximum.

* Multi-layer AHB system bus at 125 MHz with three separate layers.

* On-chip memory:

* Two Tightly Coupled Memories TCM, 16 kB Instruction TCM ITCM, 16 kB Data TCM DTCM.

* Two separate internal Static RAM SRAM instances; 32 kB SRAM and 16 kB SRAM.

* 8 kB ETB SRAM also available for code execution and data.

* Up to 768 kB high-speed flash-program memory.

* 16 kB true EEPROM, byte-erasable and programmable.

* Dual-master, eight-channel GPDMA controller on the AHB multi-layer matrix which can be used with the SPI interfaces and the UARTs, as well as for memory-to-memory transfers including the TCM memories.

* External Static Memory Controller SMC with eight memory banks; up to 32-bit data bus; up to 24-bit address bus.

* Serial interfaces:

* Two-channel CAN controller supporting FullCAN and extensive message filtering

* Two LIN master controllers with full hardware support for LIN communication. The LIN interface can be configured as UART to provide two additional UART interfaces.

* Two 550 UARTs with 16-byte Tx and Rx FIFO depths, DMA support, and RS485/EIA-485 9 bit support.

* Three full-duplex Q-SPIs with four slave-select lines; 16 bits wide; 8 locations deep; Tx FIFO and Rx FIFO.

* Two I²C-bus interfaces.

* Other peripherals:

* Two 10-bit ADCs, 8 channels each, with 3.3 V measurement range and conversion times as low as 2.44 μs per channel. Each channel provides a compare function to minimize interrupts.

* Multiple trigger-start option for all ADCs: timer, PWM, other ADC, and external signal input.

* Four 32-bit timers each containing four capture-and-compare registers linked to I/Os.

* Four six-channel PWMs Pulse-Width Modulators with capture and trap functionality.

* Two dedicated 32-bit timers to schedule and synchronize PWM and ADC.

* Quadrature encoder interface that can monitor one external quadrature encoder.

* 32-bit watchdog with timer change protection, running on safe clock.

* Up to 108 general-purpose I/O pins with programmable pull-up, pull-down, or bus keeper.

* Vectored Interrupt Controller VIC with 16 priority levels.

* Up to 19 level-sensitive external interrupt pins, including CAN and LIN wake-up features.

* Configurable clock-out pin for driving external system clocks.

* Processor wake-up from power-down via external interrupt pins; CAN or LIN activity.

* Flexible Reset Generator Unit RGU able to control resets of individual modules.

* Flexible Clock-Generation Unit CGU0 able to control clock frequency of individual modules:

* On-chip very low-power ring oscillator; fixed frequency of 0.4 MHz; always on to provide a Safe_Clock source for system monitoring.

* On-chip crystal oscillator with a recommended operating range from 10 MHz to 25 MHz. PLL input range 10 MHz to 25 MHz.

* On-chip PLL allows CPU operation up to a maximum CPU rate of 125 MHz.

* Generation of up to 11 base clocks.

* Seven fractional dividers.

* Second CGU CGU1 with its own PLL generates a configurable clock output.

* Highly configurable system Power Management Unit PMU:

* clock control of individual modules.

* allows minimization of system operating power consumption in any configuration.

* Standard ARM test and debug interface with real-time in-circuit emulator.

* Boundary-scan test supported.

* ETM/ETB debug functions with 8 kB of dedicated SRAM also accessible for application code and data storage.

* Dual power supply:

* CPU operating voltage: 1.8 V ± 5 %.

* I/O operating voltage: 2.7 V to 3.6 V; inputs tolerant up to 5.5 V.

* 144-pin LQFP package.

* -40 °C to +85 °C ambient operating temperature range.

## Features

LPC2917FBD144/01/,中文资料参数规格
技术参数

电源电压DC 1.71V min

针脚数 144

时钟频率 125 MHz

RAM大小 80K x 8

位数 32

输入/输出数 108 Input

电源电压 1.71V ~ 1.89V

电源电压Max 1.89 V

电源电压Min 1.71 V

封装参数

安装方式 Surface Mount

引脚数 144

封装 LQFP-144

外形尺寸

封装 LQFP-144

物理参数

工作温度 -40℃ ~ 85℃ TA

其他

产品生命周期 Active

包装方式 Tray

符合标准

RoHS标准 RoHS Compliant

含铅标准 Lead Free

REACH SVHC标准 No SVHC

LPC2917FBD144/01/,引脚图与封装图
暂无图片
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型号 制造商 描述 购买
LPC2917FBD144/01/, NXP 恩智浦 LPC2917 系列 80 kB 80 MHz ARM9 微控制器 带CAN和LIN - LQFP-144 搜索库存
替代型号LPC2917FBD144/01/,
图片 型号/品牌/封装 代替类型 描述 替代型号对比

型号: LPC2917FBD144/01/,

品牌: NXP 恩智浦

封装: 144-LQFP 125MHz 144Pin

当前型号

LPC2917 系列 80 kB 80 MHz ARM9 微控制器 带CAN和LIN - LQFP-144

当前型号

型号: LPC2917FBD144,551

品牌: 恩智浦

封装: LQFP

完全替代

ARM Microcontrollers - MCU ARM968 512K FL/48K RAM LIN 2.0

LPC2917FBD144/01/,和LPC2917FBD144,551的区别