IS43R16320E-6TL

DRAM Chip DDR SDRAM 512Mbit 32Mx16 2.5V/2.6V 66Pin TSOP-II

* Vdd and Vddq: 2.5V ± 0.2V -5, -6 * Vdd and Vddq: 2.5V ± 0.1V -4 * SSTL_2 compatible I/O * Double-data rate architecture; two data transfers per clock cycle * Bidirectional, data strobe DQS is transmitted/ received with data, to be used in capturing data at the receiver * DQS is edge-aligned with data for READs and centre-aligned with data for WRITEs * Differential clock inputs CK and CK * DLL aligns DQ and DQS transitions with CK transitions * Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS * Four internal banks for concurrent operation * Data Mask for write data. DM masks write data at both rising and falling edges of data strobe * Burst Length: 2, 4 and 8 * Burst Type: Sequential and Interleave mode * Programmable CAS latency: 2, 2.5 and 3 * Auto Refresh and Self Refresh Modes * Auto Precharge * Configuration: 16Mx32 * Package: 66-pin TSOP-II and 60 Ball BGA * Temperature Range: Automotive, A1 -40°C to +85°C Automotive, A2 -40°C to +105°C