AD7703ARZ

ANALOG DEVICES  AD7703ARZ  模数转换器, 20 bit, 4 kSPS, 双 +/-, 4.5 V, 5.5 V, WSOIC

The is an Analog-to-digital Converter ADC that uses sigma-delta conversion technique. The analog input is continuously sampled by an analog modulator whose mean output duty cycle is proportional to the input signal. The modulator output is processed by an on-chip digital filter with a 6-pole Gaussian response, which updates the output data register with 20-bit binary words at word rates up to 4kHz. The sampling rate, filter corner frequency and output word rate are set by a master clock input that may be supplied externally or by a crystal controlled on-chip clock oscillator. The inherent linearity of the ADC is excellent and endpoint accuracy is ensured by self-calibration of zero and full scale, which may be initiated at any time. The self-calibration scheme can also be extended to null system offset and gain errors in the input channel. CMOS construction ensures low power dissipation and a power-down mode reduces the idle power consumption to only 10µW.

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On-chip self-calibration circuitry

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Programmable low-pass filter

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Flexible serial interface

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Ultralow power