AD7264BCPZ-RL7

1 MSPS ， 14位，同步采样SAR ADC， PGA及4个比较 1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators

Product Details

The AD7264 is a dual, 14-bit, high speed, low power, successive approximation ADC that operates from a single 5 V power supply and features throughput rates of up to 1 MSPS per on-chip ADC 500 kSPS for the AD7264-5. Two complete ADC functions allow simultaneous sampling and conversion of two channels. Each ADC is preceded by a true differential analog input with a PGA. There are 14 gain settings available: ×1, ×2, ×3, ×4, ×6, ×8, ×12, ×16, ×24, ×32, ×48, ×64, ×96, and ×128.

The AD7264 contains four comparators. Comparator A and Comparator B are optimized for low power, whereas Comparator C and Comparator D have fast propagation delays. The AD7264 features a calibration function to remove any device offset error and programmable gain adjust registers to allow input path for example, sensor offset and gain compensation. The AD7264 has an on-chip 2.5 V reference that can be disabled if an external reference is preferred. The AD7264 is available in 48-lead LFCSP and LQFP packages.

The AD7264 is ideally suited for monitoring small amplitude signals from a variety of sensors. The devices include all the functionality needed for monitoring the position feedback signals from a variety of analog encoders used in motor control systems.

**Product Highlights**

1. Integrated PGA with a variety of flexible gain settings to allow detection and conversion of low level analog signals.

2. Each PGA is followed by a dual simultaneous sampling ADC, featuring throughput rates of 1 MSPS per ADC 500 kSPS for the AD7264-5. The conversion result of both ADCs is simultaneously available on separate data lines or in succession on one data line if only one serial port is available.

3. Four integrated comparators that can be used to count signals from pole sensors in motor control applications.

4. Internal 2.5 V reference.

### Features and Benefits

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Dual, simultaneous sampling, 14-bit, 2-channel ADC 

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True differential analog inputs

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Programmable gain stage: ×1, ×2, ×3, ×4, ×6, ×8, ×12, ×16, ×24, ×32, ×48, ×64, ×96, ×128 

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Throughput rate per ADC 

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1 MSPS for AD7264

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500 kSPS for AD7264-5

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Analog input impedance: >1 GΩ

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Wide input bandwidth 

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−3 dB bandwidth: 1.7 MHz at gain = 2

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4 on-chip comparators

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SNR: 78 dB typical at gain = 2, 71 dB typical at gain = 32 

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Device offset calibration

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System gain calibration

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On-chip reference: 2.5 V 

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−40°C to +105°C operation

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High speed serial interface 

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Compatible with SPI, QSPI™, MICROWIRE™, and DSP 

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48-lead LFCSP and LQFP packages