AD5684RBRUZ-RL7
数据手册.pdf四， 16位/ 14位/ 12位属于nanoDAC Quad, 16-/14-/12-Bit nanoDAC
Product Details
The AD5684R _nano_DAC+™ is a quad, 12-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/˚C internal reference enabled by default and a gain select pin giving a full-scale output of 2.5V gain=1 or 5V gain=2. The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm X 3mm LFCSP and a TSSOP package.
The AD5684R also incorporates a power-on-reset circuit and a RSTSEL pin that ensures the DAC outputs power up to zero-scale or midscale, and remain there until a valid write takes place. Each device contains a per-channel power-down feature that reduces the current consumption of the device to 4 uA at 3 V while in power-down mode.
The AD5684R employs a versatile SPI interface that operates at clock rates up to 50 MHz and includes a VLOGIC pin intended for 1.8V/3V/5V logic.
**Product Highlights**
1. High relative accuracy: AD5684R 12-bit: ±1LSB INL max
2. Low drift on-chip reference: 2.5V, 2ppm/°C temperature drift
3. Two package options: 3mm × 3mm 16-lead LFCSP or 16-lead TSSOP
**Applications**
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- Optical transceivers
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- Base-station power amplifiers
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- Process control PLC I/O cards
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- Industrial automation
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- Data acquisition systems
### Features and Benefits
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- High relative accuracy INL: ±2 LSB maximum at 16 bits
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- Low drift 2.5 V reference: 2 ppm/°C typical
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- Tiny package: 3 mm × 3 mm, 16-lead LFCSP
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- Total unadjusted error TUE: ±0.1% of FSR maximum
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- Offset error: ±1.5 mV maximum
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- Gain error: ±0.1% of FSR maximum
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- High drive capability: 20 mA, 0.5 V from supply rails
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- User selectable gain of 1 or 2 GAIN pin
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- Reset to zero scale or midscale RSTSEL pin
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- 1.8 V logic compatibility
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- 50 MHz SPI with readback or daisy chain
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- Low glitch: 0.5 nV-sec
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- Low power: 3.3 mW at 3 V
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- 2.7 V to 5.5 V power supply
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- −40°C to +105°C temperature range
