ADP5024ACPZ-2-R7

ANALOG DEVICES  ADP5024ACPZ-2-R7  芯片, 双路, 降压稳压器, LDO, 1.2A, LFCSP-24

Product Details

The ADP5024 combines two high performance buck regulators and one low dropout LDO regulators in a small, 24-lead 4 mm x 4 mm LFCSP to meet demanding performance and board space requirements.

The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set high, the buck regulators operate in forced PWM mode. When the MODE pin is set low, the buck regulators operate in PWM mode when the load current is above a predefined threshold. When the load current falls below a pre-defined threshold, the regulator operates in power save mode PSM, improving the light load efficiency.

The two bucks operate out of phase to reduce the input capacitor requirement. The low quiescent current, low dropout voltage, and wide input voltage range of the LDO extends the battery life of portable devices. The ADP5024 LDO maintains power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.

Regulators in the ADP5024 are activated though dedicated enable pins. The default output voltages can be either externally set in the adjustable version or factory programmable to a wide range of preset values in the fixed voltage version.

**Applications**

.

Power for processors, ASICS, FPGAs, and RF chipsets

.

Portable instrumentation and medical devices

.

Space constrained devices

### Features and Benefits

.

Main input voltage range: 2.3 V to 5.5 V

.

Two 1200 mA buck regulators and one 300 mA LDO

.

24-lead, 4 mm × 4 mm LFCSP package

.

Regulator accuracy: ±1.8%

.

Factory programmable or external adjustable VOUTx

.

3 MHz buck operation with forced PWM and automatic PWM/PSM modes

.

BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V

.

LDO: output voltage range from 0.8 V to 4.75 V

.

LDO: low input supply voltage from 1.7 V to 5.5 V

.

LDO: high PSRR and low output noise