AT91SAM9G46B-CU

ATMEL AT91SAM9G46B-CU 32Bit Microcontroller, ARM Thumb, ARM9, 400MHz, 64KB, 64KB, 324Pins, TFBGA

The is a SMART Embedded Microprocessor Unit based on ARM926EJ-S processor, features the frequently requested combination of user interface functionality and high data rate connectivity, including LCD controller, resistive touchscreen, camera interface, audio, Ethernet 10/100 and high speed USB and SDIO. With the processor running at 400MHz and multiple 100+ Mbps data rate peripherals, the SAM9G46 provides adequate performance and bandwidth to the network or local storage media. The SAM9G46 eMPU supports DDR2 and NAND flash memory interfaces for program and data storage. An internal 133MHz multi-layer bus architecture associated with 39 DMA channels, a dual external bus interface and distributed memory including a 64kB SRAM that can be configured as a tightly coupled memory TCM sustains the high bandwidth required by the processor and the high speed peripherals.

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400MHz ARM926EJ-S ARM Thumb processor

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32kB Data cache, 32kB instruction cache, MMU

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True random number generator TRNG

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AES256-, 192-, 128-bit Key algorithm

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TDES compliant with FIPS PUB 46-3 specifications

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SHA SHA1 and SHA256 compliant with FIPS publication 180-2

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Five 32-bit Parallel I/O controllers

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160 Programmable I/O lines multiplexed with up to two peripheral I/Os with Schmitt trigger input

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133MHz Twelve 32-bit layer AHB bus matrix

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Boot from NAND flash, SDCard, dataflash or serial dataflash

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Reset controller RSTC with on-chip power-on reset

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Selectable 32768Hz Low-power and 12MHz Crystal oscillators

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Internal low-power 32kHz RC oscillator

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One PLL for the system and one 480MHz PLL optimized for USB high speed

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Two programmable external clock signals

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Advanced interrupt controller AIC

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Periodic interval timer PIT, watchdog timer WDT, real-time timer RTT & real-time clock RTC

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LCD controller LCDC supporting STN and TFT displays up to 1280 x 860

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ITU-R BT. 601/656 Image sensor interface ISI

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Dual high speed USB host and a high speed USB device with on-chip transceivers