ADSP-21060KSZ-160

ANALOG DEVICES  ADSP-21060KSZ-160  芯片, 数字信号控制器, 32位, 40MHZ, 5.25V, MQFP-240

The is a SHARC® Signal Processing Microcomputer offers high levels of DSP performance. The ADSP-2106x builds on the ADSP-21000 DSP core to form a complete system on a chip, adding a dual-ported on-chip SRAM and integrated I/O peripherals supported by a dedicated I/O bus. Fabricated in a high speed, low power CMOS process, the ADSP-2106x has a 25ns instruction cycle time and operates at 40MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle. It represents a new standard of integration for signal computers, combining a high performance floating-point DSP core with integrated on-chip system features including up to 4MB SRAM memory, a host processor interface, DMA controller, serial ports and link port and parallel bus connectivity for glueless DSP multiprocessing.

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Single-cycle loop setup

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Single-cycle instruction execution

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Super Harvard architecture SHARC

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IEEE floating-point computation units

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Efficient program sequencing with zero-overhead looping

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IEEE JTAG Standard 1149.1 test access port and on-chip emulation

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Dual data address generators with modulo and bit-reverse addressing

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120 MFLOPS peak, 80 MFLOPS sustained performance

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4 Independent buses for dual data fetch, instruction fetch and nonintrusive I/O

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40MHz Instruction rate