ADSP-21369BSWZ-2A

SHARC处理器 SHARC Processors

The is a high performance Digital Signal Processor featuring Analog Devices" super Harvard architecture SHARC. The ADSP-21369 SHARC processor is members of the SIMD SHARC family of DSPs. This processor is source code-compatible with the ADSP-2126x and ADSP-2116x DSPs as well as with first generation ADSP-2106x SHARC processor in SISD single-instruction, single-data mode. The processor is 32-bit/40-bit floating-point processors optimized for high performance automotive audio applications with its large on-chip SRAM, mask programmable ROM, multiple internal buses to eliminate I/O bottlenecks and an innovative digital applications interface DAI. The ADSP-21369 processor achieves an instruction cycle time of up to 2.5ns at 400MHz. With its SIMD computational hardware, the processors can perform 2.4 GFLOPS running at 400MHz.

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Super Harvard architecture SHARC processor

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Single-instruction, multiple-data SIMD computational architecture

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Code compatible with all other members of the SHARC family

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JTAG access to memory permitted with a 64-bit key

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Protected memory region that can be assigned to limit access under program control to sensitive code

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PLL has a wide variety of software and hardware multiplier/divider ratios

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2MB of on-chip SRAM

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6MB On-chip mask programmable ROM

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S/PDIF-compatible digital audio receiver/transmitter

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4 Independent asynchronous sample rate converters SRC

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16 PWM outputs configured as four groups of four outputs