ADCLK948BCPZ
数据手册.pdfANALOG DEVICES ADCLK948BCPZ 芯片, 差分扇出缓冲器, 4.8GHZ, LFCSP-32
The is an ultrafast SiGe clock Fanout Buffer with two selectable inputs and 8 LVPECL outputs. It is designed for high speed applications requiring low jitter. The device has two selectable differential inputs via the IN SEL control pin. Both inputs are equipped with center tapped, differential, 100R on-chip termination resistors. The inputs accept DC-coupled LVPECL, CML, 3.3V CMOS single-ended and AC-coupled 1.8V CMOS, LVDS and LVPECL inputs. A VREFx pin is available for biasing AC-coupled inputs. The ADCLK948 features eight full-swing emitter coupled logic ECL output drivers. For LVPECL positive ECL operation, bias VCC to the positive supply and VEE to ground. For ECL operation, bias VCC to ground and VEE to the negative supply. The output stages are designed to directly drive 800mV each side into 50R terminated to VCC.
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- On-chip input terminations
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- 75fs RMS Broadband random jitter
